Please use this identifier to cite or link to this item:
https://doi.org/10.1109/ICSENS.2013.6688182
DC Field | Value | |
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dc.title | Energy-Efficient MRAM Access Scheme Using Hybrid Circuits Based on Spin-Torque Sensors | |
dc.contributor.author | Sharad, Mrigank | |
dc.contributor.author | Venkatesan, Rangharajan | |
dc.contributor.author | Fong, Xuanyao | |
dc.contributor.author | Raghunathan, Anand | |
dc.contributor.author | Roy, Kaushik | |
dc.date.accessioned | 2019-07-03T03:59:31Z | |
dc.date.available | 2019-07-03T03:59:31Z | |
dc.date.issued | 2013-01-01 | |
dc.identifier.citation | Sharad, Mrigank, Venkatesan, Rangharajan, Fong, Xuanyao, Raghunathan, Anand, Roy, Kaushik (2013-01-01). Energy-Efficient MRAM Access Scheme Using Hybrid Circuits Based on Spin-Torque Sensors. 12th IEEE Sensors Conference : 234-237. ScholarBank@NUS Repository. https://doi.org/10.1109/ICSENS.2013.6688182 | |
dc.identifier.isbn | 9781467346405 | |
dc.identifier.issn | 19300395 | |
dc.identifier.uri | https://scholarbank.nus.edu.sg/handle/10635/156207 | |
dc.description.abstract | Reducing the energy dissipation for on-chip memory access and the associated data transport is critical for emerging chip multiprocessors (CMP). STT-MRAM is a promising technology for future on-chip memories, owing to its attractive features like non-volatility, zero-leakage and high-density. In an MRAM, read-access and data-transport can dominate the energy-dissipation (owing to negligible leakage power and more frequent read as compared to write operations). We propose the application of nano-scale spin-torque switches for low energy MRAM access. Such spin torque switches can act as fast, compact and ultra-low voltage current-sensors that can be used to perform low-power read operations in MRAM. Such spin-torque sensors (STS) can also facilitate ultra-low voltage, current-mode data transport over global interconnects, thereby reducing the energy dissipation on data buses by more than 99%. Simulation results for 2-level MRAM-cache design using such a STS device shows the possibility of ∼90% reduction in memory access power as compared to conventional techniques. © 2013 IEEE. | |
dc.publisher | IEEE | |
dc.source | Elements | |
dc.subject | Science & Technology | |
dc.subject | Technology | |
dc.subject | Engineering, Electrical & Electronic | |
dc.subject | Remote Sensing | |
dc.subject | Engineering | |
dc.subject | spintronic | |
dc.subject | magnets | |
dc.subject | memory | |
dc.subject | low power | |
dc.subject | circuit | |
dc.subject | interconnect | |
dc.type | Conference Paper | |
dc.date.updated | 2019-07-03T03:45:59Z | |
dc.contributor.department | DEPT OF ELECTRICAL & COMPUTER ENGG | |
dc.description.doi | 10.1109/ICSENS.2013.6688182 | |
dc.description.sourcetitle | 12th IEEE Sensors Conference | |
dc.description.page | 234-237 | |
dc.published.state | Published | |
Appears in Collections: | Staff Publications Elements |
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Sharad et al. - 2013 - Energy-Efficient MRAM Access Scheme Using Hybrid Circuits Based on Spin-Torque Sensors.pdf | Published version | 1.17 MB | Adobe PDF | CLOSED | Published |
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