Please use this identifier to cite or link to this item: https://doi.org/10.1145/2744769.2744799
Title: Approximate Storage for Energy Efficient Spintronic Memories
Authors: Ranjan, Ashish
Venkataramani, Swagath
Fong, Xuanyao 
Roy, Kaushik
Raghunathan, Anand
Keywords: Science & Technology
Technology
Engineering, Electrical & Electronic
Engineering
Spintronics
Approximate Memories
Energy Efficiency
Issue Date: 1-Jan-2015
Publisher: IEEE COMPUTER SOC
Citation: Ranjan, Ashish, Venkataramani, Swagath, Fong, Xuanyao, Roy, Kaushik, Raghunathan, Anand (2015-01-01). Approximate Storage for Energy Efficient Spintronic Memories. 52nd ACM/EDAC/IEEE Design Automation Conference (DAC) 2015-July. ScholarBank@NUS Repository. https://doi.org/10.1145/2744769.2744799
Abstract: © 2015 ACM. Spintronic memories are promising candidates for future on-chIP storage due to their high density, non-volatility and near-zero leakage. However, the energy consumed by read and write operations presents a major challenge to their use as energy-efficient on-chIP memory. Leveraging the ability of many applications to tolerate impreciseness in their underlying computations and data, we explore approximate storage as a new approach to improving the energy-efficiency of spintronic memories. We identify and characterize mechanisms in STT-MRAM bit-cells that provide favorable energy-quality trade-o?s, i.e., disproportionate energy improvements at the cost of small probabilities of read/write failures. Based on these mechanisms, we design a quality-configurable memory array in which data can be stored to varying levels of accuracy based on application requirements. We integrate the quality-configurable array as a scratchpad in the memory hierarchy of a programmable vector processor and expose it to software by introducing quality-aware load/store instructions within the ISA. We evaluate the energy benefits of our proposal using a device-to-architecture modeling framework and demonstrate 40% and 19.5% improvement in memory energy and overall application energy respectively, for negligible (< 0.5%) quality loss across a suite of recognition and vision applications.
Source Title: 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)
URI: https://scholarbank.nus.edu.sg/handle/10635/156202
ISBN: 9781450335201
ISSN: 0738-100X
DOI: 10.1145/2744769.2744799
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