Please use this identifier to cite or link to this item: https://doi.org/10.1109/JSEN.2011.2124453
Title: Spin-Transfer Torque MRAMs for Low Power Memories: Perspective and Prospective
Authors: Augustine, Charles
Mojumder, Niladri Narayan
Fong, Xuanyao 
Choday, Harsha
Park, Sang Phill
Roy, Kaushik
Keywords: Science & Technology
Technology
Physical Sciences
Engineering, Electrical & Electronic
Instruments & Instrumentation
Physics, Applied
Engineering
Physics
Low power
memory
MTJ
parametric process variations
scaling
spin-transfer torque
MAGNETIC TUNNEL-JUNCTIONS
DESIGN
Issue Date: 1-Apr-2012
Publisher: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation: Augustine, Charles, Mojumder, Niladri Narayan, Fong, Xuanyao, Choday, Harsha, Park, Sang Phill, Roy, Kaushik (2012-04-01). Spin-Transfer Torque MRAMs for Low Power Memories: Perspective and Prospective. IEEE SENSORS JOURNAL 12 (4) : 756-766. ScholarBank@NUS Repository. https://doi.org/10.1109/JSEN.2011.2124453
Abstract: Electron-spin based data storage for on-chip memories has the potential for ultrahigh density, low power consumption, very high endurance, and reasonably low read/write latency. In this article, we analyze the energy-performance characteristics of a state-of-the-art spin-transfer-torque based magnetic random access memories (STT-MRAM) bit-cell in the presence of parametric process variations. In order to realize ultra low power under process variations, we propose device, bit-cell and architecture level design techniques. Such design methods at various levels of design abstraction has been found to achieve substantially enhanced robustness, density, reliability and low power as compared to their charge-based counterparts for future embedded applications. © 2011 IEEE.
Source Title: IEEE SENSORS JOURNAL
URI: https://scholarbank.nus.edu.sg/handle/10635/156192
ISSN: 1530-437X
2379-9153
DOI: 10.1109/JSEN.2011.2124453
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