Please use this identifier to cite or link to this item: https://doi.org/10.1109/TNANO.2015.2456510
Title: High-Density and Robust STT-MRAM Array Through Device/Circuit/Architecture Interactions
Authors: Kwon, Kon-Woo
Fong, Xuanyao 
Wijesinghe, Parami
Panda, Priyadarshini
Roy, Kaushik
Keywords: Science & Technology
Technology
Physical Sciences
Engineering, Electrical & Electronic
Nanoscience & Nanotechnology
Materials Science, Multidisciplinary
Physics, Applied
Engineering
Science & Technology - Other Topics
Materials Science
Physics
Cache
density
error correcting code
invert coding
magnetic tunnel junction (MTJ)
process variation
spin transfer torque magnetic random access memory (STT-MRAM)
thermal stability factor
yield
SPIN TRANSFER
ANISOTROPY
MAGNETORESISTANCE
INPLANE
CACHE
POWER
RAM
Issue Date: 1-Nov-2015
Publisher: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation: Kwon, Kon-Woo, Fong, Xuanyao, Wijesinghe, Parami, Panda, Priyadarshini, Roy, Kaushik (2015-11-01). High-Density and Robust STT-MRAM Array Through Device/Circuit/Architecture Interactions. IEEE TRANSACTIONS ON NANOTECHNOLOGY 14 (6) : 1024-1034. ScholarBank@NUS Repository. https://doi.org/10.1109/TNANO.2015.2456510
Abstract: © 2002-2012 IEEE. In spin-transfer torque magnetic random access memory (STT-MRAM), retention-, write-, and read-failures negatively impact the memory yield and density. In this paper, we jointly consider device-circuit-architecture layers to implement high-density STT-MRAM array while meeting the target yield requirement. Different types of magnetic tunnel junctions are considered at the device level, and error correcting codes (ECCs) in conjunction with invert-coding are employed as an architectural solution. Through cross-layer interactions, we present a design methodology to optimize bit-cell area while satisfying the target yield and energy consumption under process variation. Furthermore, we explore the use of invert-coding along with ECC in order to achieve higher memory density than that obtained using ECC alone. Our proposed technique can improve memory density further by proper selection of thermal stability factor based upon two observations: 1) invert-coding can fix multiple write/read failures with small storage overhead and 2) as thermal stability factor increases, retention-failure probability exponentially decreases, and thus, simple ECC is good enough for retention failure correction.
Source Title: IEEE TRANSACTIONS ON NANOTECHNOLOGY
URI: https://scholarbank.nus.edu.sg/handle/10635/156178
ISSN: 1536-125X
1941-0085
DOI: 10.1109/TNANO.2015.2456510
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