EXPERIMENTAL STUDY OF HIGH GATE TO DRAIN LEAKAGE CURRENT IN 0.18μm CMOS TECHNOLOGY

Abstract

The main objective of the project is to find the root cause of the high leakage current between Gate and Source/Drain in 0.18µm CMOS technology. High gate to source/drain leakage current is observed in the salicide bridging structure. The salicide bridging structure consists of poly silicon fingers running along the active region and the STI. High Gate to source/drain leakage can occur due to the presence of silicide over the spacer. The oxide defects in the Gate/LDD overlap region and Gate/Substrate region can also cause high leakage current between the Gate and the Source/Drain. Electrical measurements study on the leakage current indicates that the cause of high leakage is due to the gate oxide damage in the gate/substrate region.