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|Title:||INVESTIGATION ON IDDQ FAILURES||Authors:||JONATHAN LIM TZE MING||Keywords:||IDDQ
|Issue Date:||2006||Citation:||JONATHAN LIM TZE MING (2006). INVESTIGATION ON IDDQ FAILURES. ScholarBank@NUS Repository.||Abstract:||IDDQ testing is an integrated circuit (IC) test technique that is based on measuring steady state power-supply current, otherwise known as the quiescent power-supply current (IDDQ), from which this test method derives its name. This test technique has been proven to be a highly sensitive yet cost-effective test method and is currently adopted by most semiconductor manufacturers as part of their standard IC reliability test procedure. This report presents the work that was carried out in studying and identifying possible root cause(s) implicating the IDDQ test failures of two particular semiconductor lots. Methods to prevent future reoccurrences of such test failures are also suggested. Finally, various leakage current mechanisms are investigated and discussed.||URI:||https://scholarbank.nus.edu.sg/handle/10635/153976|
|Appears in Collections:||Master's Theses (Restricted)|
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