Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/153951
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dc.titleINNOVATION IN YIELD IMPROVEMENT
dc.contributor.authorLI GUANG
dc.date.accessioned2019-05-10T04:54:01Z
dc.date.available2019-05-10T04:54:01Z
dc.date.issued2008
dc.identifier.citationLI GUANG (2008). INNOVATION IN YIELD IMPROVEMENT. ScholarBank@NUS Repository.
dc.identifier.urihttps://scholarbank.nus.edu.sg/handle/10635/153951
dc.description.abstractThis report is regarding my industrial attachment at Systems on Silicon Manufacturing Co. Pte. Ltd. from July 2008 to December 2008. Methodology to solve low yield problems was presented. Then, innovative step-by-step methods for yield improvement for both systematic and "unknown" failures were evaluated. SWLY and SLLY were employed to enhance the yield for systematic failures. For "unknown" yield loss, bitmapping was used for SRAM wafers to isolate the specific faulty areas of circuitry under tests. Failure analysis was performed for wafers with defects. Ways to reduce yield loss were suggested, and as a result, yield enhancement has been realized. This means that our analytical models have been successful in solving low yield problems. Besides, Excel VBA programming skill has been learned and several macros were written to automate the time consuming Excel tasks.
dc.sourceSMA BATCHLOAD 20190422
dc.typeThesis
dc.contributor.departmentSINGAPORE-MIT ALLIANCE
dc.contributor.supervisorWONG CHEE CHEONG
dc.contributor.supervisorHON MAO SENG
dc.description.degreeMaster's
dc.description.degreeconferredMASTER OF SCIENCE IN ADVANCED MATERIALS FOR MICRO- & NANO- SYSTEMS
dc.description.otherDissertation Supervisors: 1. Assoc. Prof. Wong Chee Cheong, SMA Fellow, NTU 2. Mr Hon Mao Seng, SSMC
Appears in Collections:Master's Theses (Restricted)

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