Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/153928
Title: AUTOMATED SYSTEM FOR SoC (SYSTEM-ON-CHIP) DESIGN DEFINITION & GENERATION
Authors: MARIAM REENY GEORGE
Keywords: FPGA
Reconfigurable computing
ASIC and VHDL
Issue Date: 2003
Citation: MARIAM REENY GEORGE (2003). AUTOMATED SYSTEM FOR SoC (SYSTEM-ON-CHIP) DESIGN DEFINITION & GENERATION. ScholarBank@NUS Repository.
Abstract: In the last decade, reconfigurable computing devices like FPGA's have emerged as the alternative for ASIC's and software programmed microprocessors, achieving much higher performance than software, while maintaining a higher level of flexibility than hardware. Although the design time of applications in FPGAs is still shorter than those of ASICs, programming FPGAs is still a complex exercise. Here we present a new design environment which brings hardware design onto the domain of a common programmer. An Interface based design methodology is adopted to achieve this goal. This dissertation presents in detail, the design and implementation of a novel tool which automates the design entry on a SoC (System-on-Chip). Also presented are the test libraries, built and experimented.
URI: https://scholarbank.nus.edu.sg/handle/10635/153928
Appears in Collections:Master's Theses (Restricted)

Show full item record
Files in This Item:
File Description SizeFormatAccess SettingsVersion 
Mariam Reeny George_Project-Nexxe_thesis&ppt_Dissertation.pdf233.27 kBAdobe PDF

RESTRICTED

NoneLog In

Google ScholarTM

Check


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.