Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/153674
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dc.titleC015 YIELD IMPROVEMENT
dc.contributor.authorFATWA FIRDAUS ABDI
dc.date.accessioned2019-05-03T03:33:23Z
dc.date.available2019-05-03T03:33:23Z
dc.date.issued2006
dc.identifier.citationFATWA FIRDAUS ABDI (2006). C015 YIELD IMPROVEMENT. ScholarBank@NUS Repository.
dc.identifier.urihttps://scholarbank.nus.edu.sg/handle/10635/153674
dc.description.abstractIn the wafer fab environment, defect density or what we used to call D0, is a very important index. It is the one that drives the yield performance. Therefore, to improve yield, we need to reduce the defect density. Defect is defined as imperfect film formation or pattern definition due to incorrect process conditions, external particles, or equipment contamination. They can be in random, clustered, or repeating. However, they are not always catastrophic. It is therefore divided into two categories, killing and not killing. Killer defects, such as pattern fail, are surely catastrophic and affecting the yield. However, presence of small particles in an open area most of the time would not really hurt the chip. Thus, it is important in identification of the types of the defects. In this thesis, defect density of 0.15 micron technology devices in SSMC was analyzed. Due to the novelty in the fab, this technology still has a high defect count which mostly lies in the front end processes. Therefore, since reducing defect count would increase the yield as said earlier, it is our objective to localize the source of defects and identify the root cause of the defects. From there, corrective action would then be taken to reduce the defect count.
dc.sourceSMA BATCHLOAD 20190422
dc.subjectdefect
dc.subjectdensity
dc.subjectdefect count
dc.subject0.15 micron
dc.subjectroot cause
dc.subjectfront end processes
dc.subjectSSMC
dc.subjectpartitioning
dc.subjectyield improvement
dc.subjectsignature
dc.typeThesis
dc.contributor.departmentSINGAPORE-MIT ALLIANCE
dc.contributor.supervisorAU HING HO
dc.contributor.supervisorGAN CHEE LI
dc.description.degreeMaster's
dc.description.degreeconferredMASTER OF SCIENCE IN ADVANCED MATERIALS FOR MICRO- & NANO- SYSTEMS
dc.description.otherDissertation Supervisors: 1. Au Hing Ho, Principal Engineer, SSMC. 2. Asst Prof Gan Chee Lip, SMA Fellow, NTU
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