Design of self-tuning frequency synthesizer

Abstract

This thesis describes the design and implementation of a self-tuning frequency synthesizer. The aim is to design a frequency synthesizer that is able to self-tune when there is a process, temperature and voltage variation. This allows the designers to design a low gain frequency synthesizer system, which produces a low phase noise without process variation constraint. The simulation results and the experimental results are presented in this report. The frequency synthesizer is fabricated in a 0.25 um six level metal Silicon Germanium (SiGe) process. With a supply voltage of 2.5 V, the test results show that the frequency synthesizer is able to calibrate itself even though there is a frequency drift of around 250 MHz in the Voltage Controlled Oscillator (VCO). The measured phase noise of the frequency synthesizer is -81.50 dBc at 10 kHz offset.