Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/15080
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dc.titleAutomated application-specific instruction set generation
dc.contributor.authorXU CE
dc.date.accessioned2010-04-08T10:49:50Z
dc.date.available2010-04-08T10:49:50Z
dc.date.issued2006-02-09
dc.identifier.citationXU CE (2006-02-09). Automated application-specific instruction set generation. ScholarBank@NUS Repository.
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/15080
dc.description.abstractExtensible instruction-set processors are effective for large complex embedded applications. However, the performance of such reconfigurable processors relies on successfully finding the critical custom instruction set. To reduce this intensive task which is traditionally performed by experts, an automated custom instruction generation system is developed in this research. The proposed system first explores the applicationa??s data flow graph and generates all valid custom instruction candidates, subjected to pre-configured resource constraints. Next a custom instruction set is selected using a greedy algorithm, guided by intelligent speedup estimation of each candidate. Finally, the system optimally maps an application onto the newly generated instruction set. This work uses MiBench to study the parameters that affect the speedup, including input-output constraints, custom instruction set size and cross-application compilation. A case study on H.264/AVC is performed and results are presented. Experiments show the proposed system is able to identify the critical patterns, achieving 15%-70% speedup.
dc.language.isoen
dc.subjectASIP, Design Automation, Data Flow Graph, Sub-Graph Isomorphism, DAG Covering, Branch-and-Bound
dc.typeThesis
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.contributor.supervisorTAY TENG TIOW
dc.description.degreeMaster's
dc.description.degreeconferredMASTER OF ENGINEERING
dc.identifier.isiutNOT_IN_WOS
Appears in Collections:Master's Theses (Open)

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