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|Title:||Wafer warpage detection during bake process in photolithography||Authors:||YANG KAI||Keywords:||Microlithography Warpage Critical Dimension (CD)||Issue Date:||9-Sep-2004||Citation:||YANG KAI (2004-09-09). Wafer warpage detection during bake process in photolithography. ScholarBank@NUS Repository.||Abstract:||AbstractMicrolithography Surface flatness is one of the most important qualities of product from microlithography process. In-process measurement of warpage in wafer flatness during microlithography process is a crucial factor in ensuring high quality lithography products. Many methods of warpage measurement are currently available. However, for accurate estimation of warpage, most of these methods require specific equipments to be added to the lithography process. I proposed a method to estimate the warpage based on temperature drop measured on hotplate and wafer during a typical lithography baking process. The new proposed method has an advantage over the present methods of measuring warpage, in terms of complexity of process steps and equipment required. Comparatively, this method is more economical due to the simple requirement for its equipment: only thermal sensors on bake plate are required for implementation the method since it can be done at the same time with the baking process, this method can be easily integrated to the lithography process, enabling the industry to combine the monitoring of wafer warpage in the lithography process.The accuracy of this model is verified experimentally by emulating bake process using wafer and hotplate. It has been shown through system analysis and experimental results that this method can be a powerful tool in estimating warpage.||URI:||http://scholarbank.nus.edu.sg/handle/10635/14142|
|Appears in Collections:||Master's Theses (Open)|
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