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|Title:||Circuit performance and yield optimization with worst-case and Monte Carlo analyses||Authors:||Lan, C.S.
|Issue Date:||1997||Citation:||Lan, C.S.,Wenjun, Z.,Tao, K.,Qing, G. (1997). Circuit performance and yield optimization with worst-case and Monte Carlo analyses. International Symposium on IC Technology, Systems and Applications 7 : 653-655. ScholarBank@NUS Repository.||Abstract:||This paper proposes a methodology for analog circuit performance and production yield optimization with the assistance of worst-case analysis and Monte Carlo simulation. Experimental results with a new commercial circuit is presented. Compared with the initial circuit, our optimized circuit is much more stable and has almost 100% predicted yield. Our work shows that Monte Carlo analysis can provide useful information to guide a designer in determining the nominal values as well as tolerance of circuit components so that an optimal design and required production yield can be obtained.||Source Title:||International Symposium on IC Technology, Systems and Applications||URI:||http://scholarbank.nus.edu.sg/handle/10635/115393|
|Appears in Collections:||Staff Publications|
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