TWO-DIMENSIONAL SEMICONDUCTOR FIELD-EFFECT TRANSISTORS FOR ENERGY-EFFICIENT COMPUTING VIA METAL CONTACTS AND FERROELECTRIC GATE STACKS ENGINEERING

CHIEN YU-CHIEH

Publication

TWO-DIMENSIONAL SEMICONDUCTOR FIELD-EFFECT TRANSISTORS FOR ENERGY-EFFICIENT COMPUTING VIA METAL CONTACTS AND FERROELECTRIC GATE STACKS ENGINEERING

CHIEN YU-CHIEH

Abstract

Extracting contact resistance and intrinsic charge carrier mobility in two-dimensional field-effect transistors is imperative to unveil the fundamental device parameters. This thesis successfully implemented a universal extraction framework, allowing one to perform parameter extraction from a standalone device configuration. The universality of the proposed method is validated by successfully implementing the extraction to various 2D semiconductors with top and bottom gated configurations. On the other hand, this thesis attempts to deliver a multi-functional and reconfigurable device platform by synergetically exploiting the 2D-ferroelectric system for versatile applications. Strategic materials selection and structural design of the ferroelectric gate stacks are performed to optimize the desired functionality, which effectively translates into several successful demonstrations, including an energy-efficient non-volatile synapse for neuromorphic computing, a biomimetic ferroelectric-2D encoder for temporal-efficient spiking neural network, and a machine learning attack resilient true random number generator.