Analysis of column interconnects for wafer level packages
SUN WEI
SUN WEI
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Abstract
This thesis focuses on the solder joint thermo-mechanical reliability analysis of Copper column (CuC) interconnect for wafer level packages. First, a simulation-based design optimization process was established based on ABAQUS and Minitab. This process integrated finite element simulation, design of experiment and numerical optimization, generating a systematic and efficient method that can study the effects of various design parameters on system response. Secondly, two new advanced finite element simulation methodologies, based on modeling chip/substrate as shells and interconnects as beams, together with shell-to-solid coupling and submodeling techniques, were developed to address the modeling difficulty of CuC interconnect in large packages with ultra-fine pitch. A feasibility demonstration of the two methodologies was firstly given. After this, as a case study, shell-and-beam-submodeling approach was chosen for solder joint fatigue life prediction of three different CuC interconnects in 20mm by 20mm wafer level packages with 100A?m pitch.
Keywords
interconnect, fatigue, finite element analysis, submodeling, design of experiment, wafer level packaging
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Date
2006-03-21
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Thesis