Browsing by Author Lo, G.Q.

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Issue DateTitleAuthor(s)
2010A MEMS platform for 2-D fine-positioning and locking of optical ball-lens in silicon photonics packagingZhang, Q.X.; Du, Y. ; Tan, C.W.; Zhang, J.; Yu, M.B.; Lo, G.Q.; Kwong, D.L.
2011A novel MEMS configuration for three dimensional fine positioning and mechanical fixing of a ball lens in the packaging of silicon photonicsZhang, Q.X.; Du, Y. ; Tan, C.W.; Zhang, J.; Yu, M.B.; Lo, G.Q.; Kwong, D.L.
2008Application of dopant segregation to metal-germanium-metal photodetectors and its dark current suppression mechanismZang, H.; Lee, S.J. ; Loh, W.Y.; Wang, J.; Yu, M.B.; Lo, G.Q.; Kwong, D.L.; Cho, B.J. 
2009Charge-based capacitance measurement technique for nanoscale devices: Accuracy assessment based on TCAD simulationsZhao, H.; Rustagi, S.C.; Ma, F.-J. ; Samudra, G.S. ; Singh, N.; Lo, G.Q.; Kwong, D.-L.
May-2011Chip-level thermoelectric power generators based on high-density silicon nanowire array prepared with top-down CMOS technologyLi, Y.; Buddharaju, K.; Singh, N.; Lo, G.Q.; Lee, S.J. 
2007CMOS compatible dual metal gate integration with successful vth adjustment on high-k HfTaON by high-temperature metal intermixingRen, C.; Chan, D.S.H. ; Loh, W.Y.; Peng, J.W.; Balakumar, S.; Jiang, Y.; Tung, C.H.; Du, A.Y.; Lo, G.Q.; Kumar, R.; Balasubramanian, N.; Kwong, D.-L.
Nov-2007CMOS compatible dual metal gate integration with successful Vth adjustment on high-k HfTaON by high-temperature metal intermixingRen, C.; Chan, D.S.H. ; Loh, W.Y.; Lo, G.Q.; Balasubramanian, N.; Kwong, D.-L.
2009CMOS compatible Ge/Si core/shell nanowire gate-all-around pMOSFET integrated with HfO2/TaN gate stackPeng, J.W.; Singh, N.; Lo, G.Q.; Kwong, D.L.; Lee, S.J. 
Feb-2008Dark-current suppression in metal-germanium-metal photodetectors through dopant-segregation in NiGe - Schottky barrierZang, H.; Lee, S.J. ; Loh, W.Y.; Wang, J.; Chua, K.T.; Yu, M.B.; Cho, B.J. ; Lo, G.Q.; Kwong, D.-L.
2009Dopant Segregated Schottky (DSS) Source/Drain for Germanium p-MOSFETs with Metal Gate/High-k Dielectric StackYa Lim, P.S.; Chi, D.Z.; Lo, G.Q.; Yeo, Y.C. 
2006Effects of annealing and temperature on SGOI fabrication using Ge condensationBalakumar, S.; Ong, C.S.; Tung, C.H.; Trigg, A.; Li, M.F.; Kumar, R.; Lo, G.Q.; Balasubramanian, N.; Yeo, Y.C. ; Kwong, D.L.
Oct-2009Enhanced sensitivity of small-size (with 1-μm gate length) junction-field-effect-transistor-based germanium photodetector using two-step germanium epitaxy by ultrahigh vacuum chemical vapor depositionWang, J. ; Zang, H.; Yu, M.B.; Xiong, Y.Z.; Lo, G.Q.; Kwong, D.L.; Lee, S.J. 
2008Epitaxially grown n-ZnOMgOTiN n+ -Si (111) heterostructured light-emitting diodeSun, X.W.; Zhao, J.L.; Tan, S.T.; Tan, L.H.; Tung, C.H.; Lo, G.Q.; Kwong, D.L.; Zhang, Y.W.; Li, X.M.; Teo, K.L. 
2006Fabrication of high Ge content SiGe layer on Si by Ge condensation techniqueBalakumar, S.; Jun Wei, T.; Tung, C.H.; Lo, G.Q.; Nguyen, H.S.; Fong, C.S.; Agarwal, A.; Kumar, R.; Balasubramanian, N.; Lee, S.J. ; Kwong, D.L.
Jul-2007Flicker noise and its degradation characteristics under electrical stress in MOSFETs with thin strained-Si/SiGe dual-quantum wellJiang, Y.; Loh, W.Y.; Chan, D.S.H. ; Xiong, Y.Z.; Ren, C.; Lim, Y.F.; Lo, G.Q.; Kwong, D.-L.
Jun-2008Ge-rich (70%) SiGe nanowire MOSFET fabricated using pattern-dependent Ge-condensation techniqueJiang, Y.; Singh, N.; Liow, T.Y.; Loh, W.Y.; Balakumar, S.; Hoe, K.M.; Tung, C.H.; Bliznetsov, V.; Rustagi, S.C.; Lo, G.Q.; Chan, D.S.H. ; Kwong, D.L.
Jan-2011Germanium nanowire metal-oxide-semiconductor field-effect transistor fabricated by complementary-metal-oxide-semiconductor-compatible processPeng, J.W.; Singh, N.; Lo, G.Q.; Bosman, M.; Ng, C.M.; Lee, S.J. 
Nov-2007Impact of local strain from selective epitaxial germanium with thin Si/SiGe buffer on high-performance p-i-n photodetectors with a low thermal budgetLoh, W.Y.; Wang, J. ; Ye, J.D.; Yang, R.; Nguyen, H.S.; Chua, K.T.; Song, J.F.; Loh, T.H.; Xiong, Y.Z.; Lee, S.J. ; Yu, M.B.; Lo, G.Q.; Kwong, D.L.
2008Improved carrier injection in gate-all-around Schottky barrier silicon nanowire field-effect transistorsPeng, J.W.; Lee, S.J. ; Liang, G.C.A. ; Singh, N.; Zhu, S.Y.; Lo, G.Q.; Kwong, D.L.
2007Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devicesZang, H.; Loh, W.Y. ; Oh, H.J. ; Choi, K.J.; Nguyen, H.S.; Lo, G.Q.; Cho, B.J.