Browsing by Author YOO WON JONG

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Issue DateTitleAuthor(s)
2005Impact of buried capping layer on electrical stablity of advanced interconnectsYiang, K.Y.; Yoo, W.J. ; Krishnamoorthy, A.
2005Impact of buried capping layer on TDDB physics of advanced interconnectsYiang, K.Y.; Yoo, W.J. ; Krishnamoorthy, A.; Tang, L.J.
Jan-2002In situ trench etching and releasing technique of high aspect ratio beams using magnetically enhanced reactive ion etchingKok, K.W.; Yoo, W.J. ; Sooriakumar, K.
10-May-2006Integrated process of photoresist trimming and dielectric hard mask etching for sub-50 nm gate patterningBliznetsov, V.; Kumar, R.; Lin, H.; Ang, K.-W.; Yoo, W.J. ; Du, A.
21-Jul-2003Investigation of electrical conduction in carbon-doped silicon oxide using a voltage ramp methodYiang, K.Y.; Yoo, W.J. ; Guo, Q.; Krishnamoorthy, A.
Jul-2004Investigation of etching properties of HfO based high-K dielectrics using inductively coupled plasmaChen, J. ; Yoo, W.J. ; Tan, Z.Y.L.; Wang, Y.; Chan, D.S.H. 
Jul-2005Investigation of etching properties of metal nitride/high-k gate stacks using inductively coupled plasmaHwang, W.S.; Chen, J. ; Yoo, W.J. ; Bliznetsov, V.
Sep-2002Investigation of in situ trench etching process and Bosch process for fabricating high-aspect-ratio beams for microelectromechanical systemsKok, K.W.; Yoo, W.J. ; Sooriakumar, K.; Pan, J.S.; Lee, E.Y.
2006Investigation of wet etching properties and annealing effects of Hf-based high-k materialsChen, J. ; Jong Yoo, W. ; Chan, D.S.H. 
2005Lanthanide and Ir-based dual metal-Gate/HfAlON CMOS with large work-function differenceYu, D.S.; Chin, A. ; Wu, C.H.; Li, M.-F. ; Zhu, C. ; Wang, S.J.; Yoo, W.J. ; Hung, B.F.; McAlister, S.P.
2005Long retention and low voltage operation using IrO2/HfAlO/HfSiO/ HfAlO gate stack for memory applicationWang, Y.Q.; Singh, P.K.; Yoo, W.J. ; Yeo, Y.C. ; Samudra, G. ; Chin, A.; Hwang, W.S.; Chen, J.H. ; Wang, S.J.; Kwong, D.-L.
Jul-2005Low noise RF MOSFETs on flexible plastic substratesKao, H.L.; Chin, A. ; Hung, B.F.; Lee, C.F.; Lai, J.M.; McAlister, S.P.; Samudra, G.S. ; Yoo, W.J. ; Chi, C.C.
Oct-2004Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrodeZhu, S. ; Yu, H.Y. ; Chen, J.D. ; Whang, S.J. ; Chen, J.H. ; Shen, C.; Zhu, C. ; Lee, S.J. ; Li, M.F. ; Chan, D.S.H. ; Yoo, W.J. ; Du, A.; Tung, C.H.; Singh, J.; Chin, A.; Kwong, D.L.
2005Low voltage high speed SiO2/AlGaN/AlLaO3/TaN memory with good retentionChin, A. ; Laio, C.C.; Chen, C.; Chiang, K.C.; Yu, D.S.; Yoo, W.J. ; Samudra, G.S. ; Wang, T.; Hsieh, I.J.; McAlister, S.P.; Chi, C.C.
2004Metallization and dielectric reliability in Cu interconnects: Effect of cap layers and surface treatmentsKrishnamoorthy, A.; Vairagar, A.V.; Yiang, K.Y.; Mhaisalkar, S.G.; Yoo, W.J. 
12-Feb-2009Nonvolatile Flash Memory Device and Method for Producing Dielectric Oxide Nanodots on Silicon DioxideCHEN JINGHAO ; YOO WON JONG ; CHAN SIU HUNG DANIEL 
Nov-2004Nonvolatile flash memory device using Ge nanocrystals embedded in HfAlO High-κ tunneling and control oxides: Device fabrication and electrical performanceChen, J.H. ; Wang, Y.Q.; Yoo, W.J. ; Yeo, Y.-C. ; Samudra, G. ; Chan, D.S.H. ; Du, A.Y.; Kwong, D.-L.
2005Novel SiO2/AlN/HfAlO/IrO2 memory with fast erase, large ΔVth and good retentionLai, C.H.; Chin, A. ; Chiang, K.C.; Yoo, W.J. ; Cheng, C.F.; McAlister, S.P.; Chi, C.C.; Wu, P.
Jan-2006Rapid thermal oxidation of Ge-rich Si1-xGex heterolayersBera, M.K.; Chakraborty, S.; Das, R.; Dalapati, G.K.; Chattopadhyay, S.; Samanta, S.K. ; Yoo, W.J. ; Chakraborty, A.K.; Butenko, Y.; Šiller, L.; Hunt, M.R.C.; Saha, S.; Maiti, C.K.
2003Reliability characterization of organic ultra low k film using ramp voltage breakdownKrishnamoorthy, A.; Murthy, B.R.; Yiang, K.Y.; Yoo, W.J.