Browsing DSpace | ScholarBank@NUS

Browsing by Author TULIKA MITRA

Select a letter below to browse by last name or type
0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Showing results 1 to 20 of 88 next >

Refman EndNote Bibtex RefWorks Excel CSV PDF Send via email

Issue Date	Title	Author(s)
2009	A DVS-based pipelined reconfigurable instruction memory	Zhiguo, G.; Mitra, T. ; Wong, W.-F.
2009	A hybrid local-global approach for multi-core thermal management	Jayaseelan, R.; Mitra, T.
2013	A just-in-time customizable processor	Chen, L.; Tarango, J.; Mitra, T. ; Brisk, P.
2003	A model for hardware realization of kernel loops	Liao, J.; Wong, W.-F. ; Mitra, T.
2011	A novel online hardware task scheduling and placement algorithm for 3D partially reconfigurable FPGAs	Marconi, T.; Mitra, T.
2007	A retargetable software timing analyzer using architecture description language	Li, X.; Roychoudhury, A. ; Mitra, T. ; Mishra, P.; Cheng, X.
2003	Accurate Estimation of Cache-Related Preemption Delay	Negi, H.S.; Mitra, T. ; Roychoudhury, A.
2003	Accurate timing analysis by modeling caches, speculation and their interaction	Li, X.; Mitra, T. ; Roychoudhury, A.
Dec-2013	An analytical approach for fast and accurate design space exploration of instruction caches	Liang, Y.; Mitra, T.
2007	An efficient framework for dynamic reconfiguration of instruction-set customization	Huynh, H.P.; Sim, J.E. ; Mitra, T.
2009	An efficient framework for dynamic reconfiguration of instruction-set customization	Huynh, H.P.; Sim, J.E. ; Mitra, T.
2002	An FPGA implementation of triangle mesh decompression	Mitra, T. ; Chiueh, T.-C.
2005	Analyzing loop paths for execution time estimation	Roychoudhury, A. ; Mitra, T. ; Negi, H.S.
2012	Bahurupi: A polymorphic heterogeneous multi-core architecture	Pricopi, M.; Mitra, T.
2008	Cache modeling in probabilistic execution time analysis	Liang, Y. ; Mitra, T.
2008	Cache-aware optimization of BAN applications	Liang, Y. ; Ju, L. ; Chakraborty, S. ; Mitra, T. ; Roychoudhury, A.
2009	Cache-aware optimization of BAN applications	Ju, L. ; Liang, Y. ; Chakraborty, S.; Mitra, T. ; Roychoudhury, A.
2009	Cache-aware timing analysis of streaming applications	Chakraborty, S. ; Mitra, T. ; Roychoudhury, A. ; Thiele, L.
2007	Cache-aware timing analysis of streaming applications	Chakraborty, S. ; Mitra, T. ; Roychoudhury, A. ; Thiele, L.; Bordoloi, U.D.; Derdiyok, C.
2004	Characterizing embedded applications for instruction-set extensible processors	Yu, P.; Mitra, T.

Showing results 1 to 20 of 88 next >