Please use this identifier to cite or link to this item: https://doi.org/10.1021/jp909673j
Title: Aligned tin oxide nanonets for high-performance transistors
Authors: Sun, C.
Mathews, N.
Zheng, M.
Sow, C.H. 
Wong, L.H.
Mhaisalkar, S.G.
Issue Date: 21-Jan-2010
Citation: Sun, C., Mathews, N., Zheng, M., Sow, C.H., Wong, L.H., Mhaisalkar, S.G. (2010-01-21). Aligned tin oxide nanonets for high-performance transistors. Journal of Physical Chemistry C 114 (2) : 1331-1336. ScholarBank@NUS Repository. https://doi.org/10.1021/jp909673j
Abstract: Highly oriented tin oxide (SnO2) nanowire network (nanonets) based devices fabricated through photolithographyfree techniques are studied. These nanowire networks are studied at submillimeter scales for their utilization as the active material in thin film transistors for macroelectronics. The SnO2 nanowire network transistors show excellent device characteristics and possess electron mobilities of ∼7.5 cm2 V-1 s-1 and on/off ratios between 10 6 and 108 with channel lengths ranging from 75 to 175 μm. Exposure of the SnO2 nanonet transistors to the ambient results in positive threshold voltage shifts due to electron trapping by oxygen at the nanowire surface. On the contrary, the electrical properties of the devices remained unchanged upon passivation by a polystyrene (PS) layer, which demonstrates a practical way to enhance the device performance in air. These results suggest that SnO2 nanonets that offer fault tolerance, flexibility, and high transparency due to low areal coverage could be a suitable candidate for low-cost, large-area electronics. © 2010 American Chemical Society.
Source Title: Journal of Physical Chemistry C
URI: http://scholarbank.nus.edu.sg/handle/10635/95740
ISSN: 19327447
DOI: 10.1021/jp909673j
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