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Title: Improved slim sector model for analysis of solder joint reliability
Authors: Zhao, B.
Tay, A.A.O. 
Issue Date: 2005
Source: Zhao, B.,Tay, A.A.O. (2005). Improved slim sector model for analysis of solder joint reliability. Proceedings of 7th Electronics Packaging Technology Conference, EPTC 2005 2 : 431-438. ScholarBank@NUS Repository.
Abstract: Within the next three years, it is likely that the interconnection pitch of the advanced flip chip will come down to 100 micron. In order to study the solder joint reliability more efficiently, a slim sector model has been developed to handle the large number of interconnects involved [1]. The number of nodes and elements of the slim sector model is much lesser than that of the traditional one-eighth model. However, more effort, are required in the preprocessing. This paper presents an improved slim sector model. The intermediate layer between chip and substrate is treated as a continuum layer since the solder joints are distributed evenly. The advantage of transversely isotropic behaviour is taken into account. The effective mechanical properties of the equivalent continuum layer are evaluated using a 3-D representative volume element (RVE) based on continuum mechanics and a numerical homogenization method. Formulae to extract the effective material constants are derived using elasticity theory. With finite element analysis of four cases of loading to the RVE, transversely isotropic plasticity model are obtained. Characteristic parameters for Hill's formulation are extracted from the numerical experiments. Temperature dependent mechanical properties are taken into account. Thermal reliability analysis of a 6×6mm2 flip chip package was carried out using the continuum layer with effective mechanical properties and heterogeneous structure. Numerical results show that the difference of displacement is 3-5%. As a result, the error percentage of maximum inelastic shear strain and fatigue life prediction is 5% and 9%, respectively. The improvement of time efficiency in terms of preprocessing and computational time is significant. © 2005 IEEE.
Source Title: Proceedings of 7th Electronics Packaging Technology Conference, EPTC 2005
ISBN: 0780395786
Appears in Collections:Staff Publications

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