Please use this identifier to cite or link to this item: https://doi.org/10.1109/IEDM.2009.5424354
Title: Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric
Authors: Oh, H.J. 
Lin, J.Q.
Suleiman, S.A.B.
Lo, G.Q.
Kwong, D.L.
Chi, D.Z.
Lee, S.J. 
Issue Date: 2009
Source: Oh, H.J.,Lin, J.Q.,Suleiman, S.A.B.,Lo, G.Q.,Kwong, D.L.,Chi, D.Z.,Lee, S.J. (2009). Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric. Technical Digest - International Electron Devices Meeting, IEDM : 13.6.1-13.6.4. ScholarBank@NUS Repository. https://doi.org/10.1109/IEDM.2009.5424354
Abstract: Plasma-based PH3 passivation technique is extensively studied for the surface passivation of InGaAs substrate prior to high-κ deposition. The comparative analysis reveals that the striking improvement is achieved when a stable covalent-bond PxNy layer forms at the interface during plasma PH3-passivation. We report that PxNy passivation layer improves thermal stability of high-k/InGaAs gate stack up to 750°C, which enables successful implementation of InGaAs MOSFETs by self-aligned gate-first process. By adopting PxNy passivation on InGaAs with MOCVD HfAlO and metal gate stack, we achieved subthreshold slope of 98mV/dec, G m=378mS/mm at Vd=1V, and effective mobility of 2557cm2/Vs at Eeff=0.24MV/cm. © 2009 IEEE.
Source Title: Technical Digest - International Electron Devices Meeting, IEDM
URI: http://scholarbank.nus.edu.sg/handle/10635/84301
ISBN: 9781424456406
ISSN: 01631918
DOI: 10.1109/IEDM.2009.5424354
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