Please use this identifier to cite or link to this item: https://doi.org/10.7873/DATE2014.304
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dc.titleThermal-aware frequency scaling for adaptive workloads on heterogeneous MPSoCs
dc.contributor.authorYu, H.
dc.contributor.authorSyed, R.
dc.contributor.authorHa, Y.
dc.date.accessioned2014-10-07T04:51:05Z
dc.date.available2014-10-07T04:51:05Z
dc.date.issued2014
dc.identifier.citationYu, H.,Syed, R.,Ha, Y. (2014). Thermal-aware frequency scaling for adaptive workloads on heterogeneous MPSoCs. Proceedings -Design, Automation and Test in Europe, DATE : -. ScholarBank@NUS Repository. <a href="https://doi.org/10.7873/DATE2014.304" target="_blank">https://doi.org/10.7873/DATE2014.304</a>
dc.identifier.isbn9783981537024
dc.identifier.issn15301591
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/84299
dc.description.abstractFor applications featuring adaptive workloads, the quality of their task execution can be dynamically adjusted given the runtime constraints. When mapping them to heterogeneous MPSoCs, it is expected not only to achieve the highest possible execution quality, but also meet the critical thermal challenges from the continuously increasing chip density. Prior thermal management techniques, such as Dynamic Voltage/Frequency Scaling (DVFS) and thread migration, do not take into account the trade-off possibility between execution quality and temperature control. In this paper, we explore the capability of adaptive workloads for effective temperature control, while maximally ensuring the execution Quality-of-Service (QoS). We present a thermal-aware dynamic frequency scaling (DFS) algorithm on heterogeneous MPSoCs, where judicious frequency selection achieves QoS maximization under the temperature threshold, which is converted to the thermal-timing deadline as an additional execution constraint. Results show that our frequency scaling algorithm achieves as large as 31.5% execution cycle/QoS improvement under thermal constraints. © 2014 EDAA.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.7873/DATE2014.304
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.7873/DATE2014.304
dc.description.sourcetitleProceedings -Design, Automation and Test in Europe, DATE
dc.description.page-
dc.identifier.isiutNOT_IN_WOS
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