Please use this identifier to cite or link to this item: https://doi.org/10.1109/ISPSD.2007.4294961
Title: Superjunction power LDMOS on partial SOI platform
Authors: Chen, Y.
Buddharaju, K.D.
Liang, Y.C. 
Samudra, G.S. 
Feng, H.H.
Issue Date: 2007
Source: Chen, Y., Buddharaju, K.D., Liang, Y.C., Samudra, G.S., Feng, H.H. (2007). Superjunction power LDMOS on partial SOI platform. Proceedings of the International Symposium on Power Semiconductor Devices and ICs : 177-180. ScholarBank@NUS Repository. https://doi.org/10.1109/ISPSD.2007.4294961
Abstract: Superjunction power LDMOS device implemented on the bulk Si substrate suffers from the substrate-assisted depletion (SAD) effect, which causes the charge imbalance, and thus limits the device performance. A new SJ-LDMOS structure integrated on the partial SOI (PSOI) platform is proposed in this paper, which eliminates the SAD completely and enables the making of SJ-LDMOS on bulk silicon substrate without sacrificing its electrical and thermal performance. The PSOI SJ-LDMOS was fabricated and characterized. The tested PSOI SJ-LDMOS exhibits a specific on-state resistance of 1.01mΩ-cm2 while the breakdown voltage is 72.3V. © 2007 IEEE.
Source Title: Proceedings of the International Symposium on Power Semiconductor Devices and ICs
URI: http://scholarbank.nus.edu.sg/handle/10635/84260
ISBN: 1424410959
ISSN: 10636854
DOI: 10.1109/ISPSD.2007.4294961
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