Please use this identifier to cite or link to this item:
|Title:||Strained N-channel FinFETs with 25 nm gate length and silicon-carbon source/drain regions for performance enhancement|
|Citation:||Liow, T.-Y.,Tan, K.-M.,Lee, R.T.P.,Du, A.,Tung, C.-H.,Samudra, G.S.,Yoo, W.-J.,Balasubramanian, N.,Yeo, Y.-C. (2006). Strained N-channel FinFETs with 25 nm gate length and silicon-carbon source/drain regions for performance enhancement. Digest of Technical Papers - Symposium on VLSI Technology : 56-57. ScholarBank@NUS Repository.|
|Abstract:||We report the demonstration of 25 nm gate length LG tri-gate FinFETs with Si0.99C0.01 source and drain (S/D) regions. The strain-induced mobility enhancement due to the Si0.99C 0.01 S/D leads to a drive current IDsat improvement of 20% at a fixed off-state current Ioff of 1×10-7 A/μm. With additional channel strain engineering, FinFETs incorporating Si0.99C0.01 S/D and a tensile-stress silicon nitride (SiN) capping etch-stop layer (ESL) achieve an IDsat enhancement of 56%. © 2006 IEEE.|
|Source Title:||Digest of Technical Papers - Symposium on VLSI Technology|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Oct 12, 2018
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.