Please use this identifier to cite or link to this item:
|Title:||Simulation of tunneling field-effect transistors with extended source structures|
Lu Low, K.
|Citation:||Yang, Y., Guo, P., Han, G., Lu Low, K., Zhan, C., Yeo, Y.-C. (2012-06-01). Simulation of tunneling field-effect transistors with extended source structures. Journal of Applied Physics 111 (11) : -. ScholarBank@NUS Repository. https://doi.org/10.1063/1.4729068|
|Abstract:||In this paper, we perform a study of novel source structures in double-gate (DG) Tunneling Field-Effect Transistors (TFETs) by two-dimensional numerical simulation of source structures in double gate tunneling field effect. Extended source structures are employed in both pure Ge TFETs and Ge-source Si-body TFETs, and on-state current enhancement is observed in simulation results. Compared with conventional p +-p --n + TFETs, the p + region in extended source TFETs extends underneath the gates. When large gate bias is applied, high electric field ξ, which distributes along p +-p - junction edge extends into the middle of the channel. More tunneling paths with short lengths are available in the on-state, effectively boosting the drive current of TFET. In addition, the extent of performance enhancement depends on the geometry of the extended source. By incorporating heterojunction, TFET drive current can be increased further, which is up to 0.8 mA/μm at V GS V DS 0.7 V. © 2012 American Institute of Physics.|
|Source Title:||Journal of Applied Physics|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Jul 12, 2018
WEB OF SCIENCETM
checked on Jun 5, 2018
checked on Mar 12, 2018
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.