Please use this identifier to cite or link to this item: https://doi.org/10.1149/1.2355908
Title: Silicon-carbon source/drain: Selective epitaxy, process integration, and transistor strain engineering
Authors: Yeo, Y.-C. 
Issue Date: 2006
Source: Yeo, Y.-C. (2006). Silicon-carbon source/drain: Selective epitaxy, process integration, and transistor strain engineering. ECS Transactions 3 (7) : 1143-1150. ScholarBank@NUS Repository. https://doi.org/10.1149/1.2355908
Abstract: We examine the technology options for the enhancement of electron mobility in n-channel metal-oxide-semiconductor field-effect transistors, focusing on channel strain engineering using lattice-mismatched source/drain (S/D) materials. Silicon-carbon (Si1-yCy) S/D induces lateral tensile strain in the Si channel for electron mobility and drive current improvement. This has been demonstrated on bulk planar transistors, silicon-on-insulator transistors, and multiple-gate transistors. Further performance enhancement is achieved by the combination of multiple-stressors, e.g. Si1-yCy S/D and silicon nitride liner stressor. Process integration issues and strain enhancement approaches are discussed. copyright The Electrochemical Society.
Source Title: ECS Transactions
URI: http://scholarbank.nus.edu.sg/handle/10635/84181
ISSN: 19385862
DOI: 10.1149/1.2355908
Appears in Collections:Staff Publications

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