Please use this identifier to cite or link to this item: https://doi.org/10.1109/FPT.2013.6718391
Title: SAES: A high throughput and low latency secure cloud storage with pipelined DMA based PCIe interface
Authors: Chen, Y.
Wang, Y.
Ha, Y. 
Felipe, M.R.
Ren, S.
Aung, K.M.M.
Issue Date: 2013
Citation: Chen, Y.,Wang, Y.,Ha, Y.,Felipe, M.R.,Ren, S.,Aung, K.M.M. (2013). SAES: A high throughput and low latency secure cloud storage with pipelined DMA based PCIe interface. FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology : 374-377. ScholarBank@NUS Repository. https://doi.org/10.1109/FPT.2013.6718391
Abstract: Modern cloud storage requires a high throughput and low latency data protection system, which is usually implemented with an Advanced Encryption Standard (AES) hardware accelerator connected with CPU through PCI Express (PCIe). However, most existing systems cannot simultaneously achieve high throughput and low latency, as they impose conflicting requirements to the block size of packets used in PCIe. High throughput requires the block size to be larger, while low latency requires the block size to be smaller. To provide both high throughput and low latency, we have developed an FPGA based data protection system called sAES. It uses a highly pipelined Direct Memory Access (DMA) based PCIe interface. It can achieve 10.4 Gbps throughput when the block size is 512 bytes, which is 51 times higher than the state-of-the-art Speedy PCIe interface [1]. The worst latency of sAES is only 4.368 μs when its block size is 512 bytes. © 2013 IEEE.
Source Title: FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology
URI: http://scholarbank.nus.edu.sg/handle/10635/84152
ISBN: 9781479921990
DOI: 10.1109/FPT.2013.6718391
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