Please use this identifier to cite or link to this item: https://doi.org/10.1109/IWPSD.2007.4472471
Title: Reliability analysis of thin HfO2/SiO2 gate dielectric stack
Authors: Samanta, P.
Zhu, C. 
Chan, M.
Keywords: Charge trapping
HfO2
MOS
TDDB
Issue Date: 2007
Citation: Samanta, P.,Zhu, C.,Chan, M. (2007). Reliability analysis of thin HfO2/SiO2 gate dielectric stack. Proceedings of the 14th International Workshop on the Physics of Semiconductor Devices, IWPSD : 142-145. ScholarBank@NUS Repository. https://doi.org/10.1109/IWPSD.2007.4472471
Abstract: Electrical characteristics of hafnium oxide (HfO2/silicon dioxide (SiO2) gate dielectric stack during both constant voltage stress (CVS) and constant current stress (CCS) have been experimentally investigated with varying thickness of the HfO2 layer. The generation kinetics of bulk, interface and border trapped charges have been discussed showing a correlation among them. Nature of intrinsic hole traps in SiO 2 has also been studied from an independent charge relaxation experiment. In addition, time-dependent dielectric breakdown (TDDB) has been studied during CVS. © 2007 IEEE.
Source Title: Proceedings of the 14th International Workshop on the Physics of Semiconductor Devices, IWPSD
URI: http://scholarbank.nus.edu.sg/handle/10635/84132
ISBN: 9781424417285
DOI: 10.1109/IWPSD.2007.4472471
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