Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/83968
Title: Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout
Authors: Kao, H.L.
Chin, A. 
Lai, J.M.
Lee, C.F.
Chiang, K.C.
McAlister, S.P.
Keywords: Lifetime
Model
NF min
RF noise
Stress
Issue Date: 2005
Source: Kao, H.L.,Chin, A.,Lai, J.M.,Lee, C.F.,Chiang, K.C.,McAlister, S.P. (2005). Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout. Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium : 157-160. ScholarBank@NUS Repository.
Abstract: A novel microstrip line layout is developed to direct measure the min. noise figure (NF min) accurately instead of the complicated de-embedding procedure in conventional CPW line. Very low NF min of 1.05 dB at 10 GHz is directly measured in 16 gate fingers 0.18μm MOSFETs without any de-embedding. Based on the accurate NF min measurement, we have developed the self-consistent DC, S-parameters and NF min model to predict device characteristics after the continuous stress with good accuracy. © 2005 IEEE.
Source Title: Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
URI: http://scholarbank.nus.edu.sg/handle/10635/83968
ISSN: 15292517
Appears in Collections:Staff Publications

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