Please use this identifier to cite or link to this item:
|Title:||Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout|
|Source:||Kao, H.L.,Chin, A.,Lai, J.M.,Lee, C.F.,Chiang, K.C.,McAlister, S.P. (2005). Modeling RF MOSFETs after electrical stress using low-noise microstrip line layout. Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium : 157-160. ScholarBank@NUS Repository.|
|Abstract:||A novel microstrip line layout is developed to direct measure the min. noise figure (NF min) accurately instead of the complicated de-embedding procedure in conventional CPW line. Very low NF min of 1.05 dB at 10 GHz is directly measured in 16 gate fingers 0.18μm MOSFETs without any de-embedding. Based on the accurate NF min measurement, we have developed the self-consistent DC, S-parameters and NF min model to predict device characteristics after the continuous stress with good accuracy. © 2005 IEEE.|
|Source Title:||Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Feb 17, 2018
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.