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|Title:||A new silane-ammonia surface passivation technology for realizing inversion-type surface-channel aAs N-MOSFET with 160 nm gate length and high-quality metal-gate/high-k dielectric stack|
|Citation:||Chin, H.-C.,Zhu, M.,Lee, Z.-C.,Liu, X.,Tan, K.-M.,Lee, H.K.,Shi, L.,Tang, L.-J.,Tung, C.-H.,Lo, G.-Q.,Tan, L.-S.,Yeo, Y.-C. (2008). A new silane-ammonia surface passivation technology for realizing inversion-type surface-channel aAs N-MOSFET with 160 nm gate length and high-quality metal-gate/high-k dielectric stack. Technical Digest - International Electron Devices Meeting, IEDM : -. ScholarBank@NUS Repository. https://doi.org/10.1109/IEDM.2008.4796700|
|Abstract:||We report a novel surface passivation technology employing a silane-ammonia gas mixture to realize very high quality high-k gate dielectric on GaAs. This technology eliminates the poor quality native oxide while forming an ultrathin silicon oxynitride (SiOxNy) interfacial passivation layer between the high-k dielectric and the GaAs surface. Interface state density Dit of about 1 x 1011 eV-1cm-2 was achieved, which is the lowest reported value for a high-k dielectric formed on GaAs by CVD, ALD, or PVD techniques. This enables the formation of high quality gate stack on GaAs for high performance CMOS applications. We also realized the smallest reported (160 nm gate length) inversion-type enhancement-mode surface channel GaAs MOSFET. The surface-channel GaAs MOSFETs in this work has demonstrated one of the highest peak electron mobility of ∼2100 cm 2/Vs. The lowest reported subthreshold swing (∼100 mV/decade) for surface-channel GaAs MOSFETs was also achieved for devices with longer gate length. Extensive bias-temperature instability (BTI) characterization was performed to evaluate the reliability of the gate stack.|
|Source Title:||Technical Digest - International Electron Devices Meeting, IEDM|
|Appears in Collections:||Staff Publications|
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