Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2005.844701
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dc.titleThree-layer laminated metal gate electrodes with tunable work functions for CMOS applications
dc.contributor.authorBai, W.P.
dc.contributor.authorBae, S.H.
dc.contributor.authorWen, H.C.
dc.contributor.authorMathew, S.
dc.contributor.authorBera, L.K.
dc.contributor.authorBalasubramanian, N.
dc.contributor.authorYamada, N.
dc.contributor.authorLi, M.F.
dc.contributor.authorKwong, D.-L.
dc.date.accessioned2014-10-07T04:38:32Z
dc.date.available2014-10-07T04:38:32Z
dc.date.issued2005-04
dc.identifier.citationBai, W.P., Bae, S.H., Wen, H.C., Mathew, S., Bera, L.K., Balasubramanian, N., Yamada, N., Li, M.F., Kwong, D.-L. (2005-04). Three-layer laminated metal gate electrodes with tunable work functions for CMOS applications. IEEE Electron Device Letters 26 (4) : 231-233. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2005.844701
dc.identifier.issn07413106
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/83206
dc.description.abstractThis letter presents a novel technique for tuning the work function of a metal gate electrode. Laminated metal gate electrodes consisting of three ultrathin (∼ 1-nm) layers, with metal nitrides (HfN, TiN, or TaN) as the bottom and top layers and element metals (Hf, Ti, or Ta) as the middle layer, were sequentially deposited on SiO2, followed by rapid thermal annealing annealing. Annealing of the laminated metal gate stacks at high temperatures (800 °C-1000 °C) drastically increased their work functions (as much as 1 eV for HfN-Ti-TaN at 1000 °C). On the contrary, the bulk metal gate electrodes (HfN, TiN and TaN) exhibited consistent midgap work functions with only slight variation under identical annealing conditions. The work function change of the laminated metal electrodes is attributed to the crystallization and the grain boundary effect of the laminated structures after annealing. This change is stable and not affected by subsequent high-temperature process. The three-layer laminated metal gate technique provides PMOS-compatible work functions and excellent thermal stability even after annealing at 1000 °C. © 2005 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/LED.2005.844701
dc.sourceScopus
dc.subjectCMOS
dc.subjectLaminated metal gate
dc.subjectMetal gate
dc.subjectMetal nitride
dc.subjectWork function
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/LED.2005.844701
dc.description.sourcetitleIEEE Electron Device Letters
dc.description.volume26
dc.description.issue4
dc.description.page231-233
dc.description.codenEDLED
dc.identifier.isiut000227870600003
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