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|Title:||Strained silicon-germanium-on-insulator n-MOSFET with embedded silicon source-and-drain stressors|
|Citation:||Wang, G.H., Toh, E.-H., Du, A., Lo, G.-Q., Samudra, G., Yeo, Y.-C. (2008-01). Strained silicon-germanium-on-insulator n-MOSFET with embedded silicon source-and-drain stressors. IEEE Electron Device Letters 29 (1) : 77-79. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2007.910784|
|Abstract:||In this letter, a strained silicon-germanium (SiGe) n-channel field-effect transistor (n-FET) featuring embedded silicon (Si) source-and-drain (S/D) stressors is demonstrated. A novel Ge-condensation technique was employed to form Si0.75 Ge0.25-on-insulator (SGOI) substrates with excellent surface quality. Transistors with gate length LG down to 60 nm were fabricated on the SGOI substrates. The strained n-FETs incorporated Si S/D regions, which are lattice-mismatched with respect to the Si0.75Ge0.25 channel, to induce uniaxial tensile strain in the Si0.75Ge0.25 channel for electron mobility enhancement. This leads to a 36% rise in linear drain-current and a 21% rise in saturation drive current over control SiGe channel devices at a fixed OFF-state current. Increasing the recess depth in S/D regions prior to the selective epitaxial growth of Si increases the channel stress, thus, a higher saturation drive-current enhancement can be achieved. © 2008 IEEE.|
|Source Title:||IEEE Electron Device Letters|
|Appears in Collections:||Staff Publications|
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