Please use this identifier to cite or link to this item:
|Title:||Some issues in advanced CMOS gate stack performance and reliability|
|Authors:||Li, M.-F. |
|Citation:||Li, M.-F., Wang, X.P., Shen, C., Yang, J.J., Chen, J.D., Yu, H.Y., Zhu, C., Huang, D. (2011-12). Some issues in advanced CMOS gate stack performance and reliability. Microelectronic Engineering 88 (12) : 3377-3384. ScholarBank@NUS Repository. https://doi.org/10.1016/j.mee.2009.08.013|
|Abstract:||This paper summarizes and analyzes some of our previous works on the advanced gate stacks for CMOS transistors focused on the following two topics: 1. Frequency dependence of Dynamic Bias Temperature Instability (DBTI) and the transistor degradation mechanism, 2. A novel way for metal gate Effective Work Function (EWF) modulation by incorporation of lanthanum elements in HfO 2 gate dielectric. © 2009 Elsevier B.V. All rights reserved.|
|Source Title:||Microelectronic Engineering|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Dec 13, 2018
checked on Oct 19, 2018
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.