Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2011.2108634
Title: Mechanism of stress memorization technique (SMT) and method to maximize its effect
Authors: Pandey, S.M.
Liu, J.
Hooi, Z.S.
Flachowsky, S.
Herrmann, T.
Tao, W.
Benistant, F.
See, A.
Chu, S.
Samudra, G.S. 
Keywords: Laser annealing (LSA)
stress
stress memorization technique (SMT)
TCAD
Issue Date: Apr-2011
Citation: Pandey, S.M., Liu, J., Hooi, Z.S., Flachowsky, S., Herrmann, T., Tao, W., Benistant, F., See, A., Chu, S., Samudra, G.S. (2011-04). Mechanism of stress memorization technique (SMT) and method to maximize its effect. IEEE Electron Device Letters 32 (4) : 467-469. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2011.2108634
Abstract: A simple and unified fundamental theory on the mechanism of stress memorization technique (SMT) is presented for the first time. This theory is based on the difference in thermal properties of the materials involved in SMT process, i.e., silicon (channel), polysilicon (gate), amorphous silicon (source/drain), SiO2 (gate oxide), as well as Si3N 4 (SMT nitride stressor layer), which lead to deformations during thermal anneal and SMT. This theory accounts for all the results published to date in SMT and provides important physical insights. As a demonstration of predictive capability of this theory, a 45-nm process was modified using a novel anneal sequence which raises the stress in the channel. The experimental data after the change yield additional 5% performance boost for NFET compared to a baseline SMT process. © 2011 IEEE.
Source Title: IEEE Electron Device Letters
URI: http://scholarbank.nus.edu.sg/handle/10635/82675
ISSN: 07413106
DOI: 10.1109/LED.2011.2108634
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