Please use this identifier to cite or link to this item:
https://doi.org/10.1109/LED.2005.857711
DC Field | Value | |
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dc.title | Dopant-free FUSI PtxSi metal gate for high work function and reduced Fermi-level pinning | |
dc.contributor.author | Park, C.S. | |
dc.contributor.author | Cho, B.J. | |
dc.date.accessioned | 2014-10-07T04:26:13Z | |
dc.date.available | 2014-10-07T04:26:13Z | |
dc.date.issued | 2005-11 | |
dc.identifier.citation | Park, C.S., Cho, B.J. (2005-11). Dopant-free FUSI PtxSi metal gate for high work function and reduced Fermi-level pinning. IEEE Electron Device Letters 26 (11) : 796-798. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2005.857711 | |
dc.identifier.issn | 07413106 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/82170 | |
dc.description.abstract | High work function (4.9 eV) on high-κ gate dielectric, which is suitable for bulk p-MOSFET, has been achieved using fully silicided (FUSI) PtxSi gate without boron predoping of polysilicon. High concentration of Pt in FUSI PtxSi using Ti capping layer on Pt in the FUSI process is a key to achieving high work function and reduced Fermi-level pinning on high-κ dielectric. By combining with substituted Al (SA) gate for nMOSFET, a wide range of work function difference (0.65 eV) between n and pMOSFETs is demonstrated, without any adverse effects of polysilicon predoping. © 2005 IEEE. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/LED.2005.857711 | |
dc.source | Scopus | |
dc.subject | High-κ | |
dc.subject | Metal gate | |
dc.subject | Work function | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1109/LED.2005.857711 | |
dc.description.sourcetitle | IEEE Electron Device Letters | |
dc.description.volume | 26 | |
dc.description.issue | 11 | |
dc.description.page | 796-798 | |
dc.description.coden | EDLED | |
dc.identifier.isiut | 000232821500006 | |
Appears in Collections: | Staff Publications |
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