Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2007.911987
Title: Demonstration of high-performance PMOSFETs Using Si-Six Ge1-x-Si quantum wells with high-κ metal-gate stacks
Authors: Majhi, P.
Kalra, P.
Harris, R.
Choi, K.J.
Heh, D.
Oh, J.
Kelly, D.
Choi, R.
Cho, B.J. 
Banerjee, S.
Tsai, W.
Tseng, H.
Jammy, R.
Keywords: High obility
High-κ gate dielectric
PMOSFETs
Quantum wells (QWs)
Silicon-germanium (SiGe)
Issue Date: Jan-2008
Citation: Majhi, P., Kalra, P., Harris, R., Choi, K.J., Heh, D., Oh, J., Kelly, D., Choi, R., Cho, B.J., Banerjee, S., Tsai, W., Tseng, H., Jammy, R. (2008-01). Demonstration of high-performance PMOSFETs Using Si-Six Ge1-x-Si quantum wells with high-κ metal-gate stacks. IEEE Electron Device Letters 29 (1) : 99-101. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2007.911987
Abstract: Through a systematic approach, PMOSFETs with strained quantum wells (QWs) in the Si-Ge system exhibiting high performance and low off-state leakage currents comparable to optimized gate stacks on Si are demonstrated. The encouraging results are due to selectively depositing Si-Si(x)Ge(1-x)-Si heterostructure QWs, where it appears that the critical thickness requirements for these thin films based on the lattice constant mismatch are relaxed. Furthermore, the use of optimal advanced high-κ dielectric and metal-gate electrode helped realize the good device characteristics. © 2008 IEEE.
Source Title: IEEE Electron Device Letters
URI: http://scholarbank.nus.edu.sg/handle/10635/82118
ISSN: 07413106
DOI: 10.1109/LED.2007.911987
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