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|Title:||Characteristics of high-κ spacer offset-gated polysilicon TFTs|
|Citation:||Xiong, Z., Liu, H., Zhu, C., Sin, J.K.O. (2004-08). Characteristics of high-κ spacer offset-gated polysilicon TFTs. IEEE Transactions on Electron Devices 51 (8) : 1304-1308. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2004.832720|
|Abstract:||In this paper, a self-aligned offset-gated Poly-Si TFT using high-κ dielectric (Hafnium oxide, HfO2) spacers for channel scaled-down system-on-panel applications is experimentally demonstrated for the first time. The HfO2 film is deposited by magnetron sputter deposition, and the HfO2 spacers are formed by reactive ion etching. Numerical simulations show that with the high vertical field induced underneath the high-κ spacer, an inversion layer is formed, and it effectively increases the on-state current while still maintaining a low leakage current in the off-state, comparing to the conventional lightly doped drain or oxide spacer TFTs. The experimental on-state current in the HfO2 spacer offset-gated Poly-Si TFT is approximately two times higher than that of the conventional oxide spacer TFT with the same leakage current. © 2004 IEEE.|
|Source Title:||IEEE Transactions on Electron Devices|
|Appears in Collections:||Staff Publications|
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