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https://scholarbank.nus.edu.sg/handle/10635/81800
DC Field | Value | |
---|---|---|
dc.title | Using a lattice decorrelator in the Partitioned FBLMS algorithm | |
dc.contributor.author | Chan, Kheong Sann | |
dc.contributor.author | Farhang-Boroujeny, B. | |
dc.date.accessioned | 2014-10-07T03:12:11Z | |
dc.date.available | 2014-10-07T03:12:11Z | |
dc.date.issued | 1997 | |
dc.identifier.citation | Chan, Kheong Sann,Farhang-Boroujeny, B. (1997). Using a lattice decorrelator in the Partitioned FBLMS algorithm. Proceedings of the International Conference on Information, Communications and Signal Processing, ICICS 2 : 1208-1212. ScholarBank@NUS Repository. | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/81800 | |
dc.description.abstract | In this paper, we examine a method of reducing the correlation between successive partitions in the Partitioned Fast Block Least Mean Square (PFBLMS) algorithm. This method involves replacing the tap delay line in the PFBLMS with a lattice structure resulting in a decorrelation of the tap-weight inputs and a faster convergence of the PFBLMS algorithm. We go on to examine how many lattice decorrelator structures are necessary to achieve a satisfactory convergence rate. | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.description.sourcetitle | Proceedings of the International Conference on Information, Communications and Signal Processing, ICICS | |
dc.description.volume | 2 | |
dc.description.page | 1208-1212 | |
dc.description.coden | 279 | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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