Please use this identifier to cite or link to this item:
https://doi.org/10.1149/1.1798191
DC Field | Value | |
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dc.title | Uniform void-free epitaxial CoSi 2 formation on STI bounded narrow Si(lOO) lines by template layer stress reduction | |
dc.contributor.author | Ho, C.S. | |
dc.contributor.author | Pey, K.L. | |
dc.contributor.author | Tung, C.H. | |
dc.contributor.author | Zhang, B.C. | |
dc.contributor.author | Tee, K.C. | |
dc.contributor.author | Karunasiri, G. | |
dc.contributor.author | Chua, S.J. | |
dc.date.accessioned | 2014-10-07T03:07:09Z | |
dc.date.available | 2014-10-07T03:07:09Z | |
dc.date.issued | 2004 | |
dc.identifier.citation | Ho, C.S., Pey, K.L., Tung, C.H., Zhang, B.C., Tee, K.C., Karunasiri, G., Chua, S.J. (2004). Uniform void-free epitaxial CoSi 2 formation on STI bounded narrow Si(lOO) lines by template layer stress reduction. Electrochemical and Solid-State Letters 7 (11) : H49-H51. ScholarBank@NUS Repository. https://doi.org/10.1149/1.1798191 | |
dc.identifier.issn | 10990062 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/81331 | |
dc.description.abstract | Void free epitaxial-CoSi 2 with nano-thickness has been successfully fabricated on narrow Si(lOO) substrates surrounded by shallow trench isolation (STI) using a capped titanium mediated epitaxy method. The suicide is epitaxial with a CoSi 2(110)IISi( 100) crystal orientation. Void growth in the narrow silicon lines under the film edges due to an anomalous creep effect in the presence of a localized tensile stress between CoSi 2 and Si was suppressed completely by optimizing the initial rapid thermal annealing (RTA) thermal budget, and ensuring that no voids nucleated prior to the selective wet clean and second higher-temperature RTA process. The epitaxial Co-silicided n/p metal oxide semiconductor field effect transistors show excellent device performance. © 2004 The Electrochemical Society, All rights reserved. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1149/1.1798191 | |
dc.source | Scopus | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1149/1.1798191 | |
dc.description.sourcetitle | Electrochemical and Solid-State Letters | |
dc.description.volume | 7 | |
dc.description.issue | 11 | |
dc.description.page | H49-H51 | |
dc.description.coden | ESLEF | |
dc.identifier.isiut | 000228539900049 | |
Appears in Collections: | Staff Publications |
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