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|Title:||Trap generation at Si/SiO2 interface in submicrometer metal-oxide-semiconductor transistors by 4.9 eV ultraviolet irradiation|
|Citation:||Ling, C.H. (1994-07-01). Trap generation at Si/SiO2 interface in submicrometer metal-oxide-semiconductor transistors by 4.9 eV ultraviolet irradiation. Journal of Applied Physics 76 (1) : 581-583. ScholarBank@NUS Repository. https://doi.org/10.1063/1.357046|
|Abstract:||In this paper, it was demonstrated for the first time, employing capacitance measurements, UV radiation-induced traps at Si/SiO2 interface in metal-oxide-semiconductor transistors (MOSFETs) with a device area WLeffapprox.20 μm2. The test device was an N+ polysilicon gate surface channel lightly doped drain NMOSFET, developed utilizing twin-well complimentary MOS nitride spacer technology with gate oxide thickness of 15nm and designed to function at substrate bias -2V. The gate-to-drain capacitance was determined by injecting a signal at the drain and measuring at the gate. It was suggested that the generation of traps was due to the breaking of Si-H bond caused by UV radiation and the development of the silicon trivalent defect. An estimate of the trap density detection sensitivity of the gate capacitance method was also provided.|
|Source Title:||Journal of Applied Physics|
|Appears in Collections:||Staff Publications|
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