Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/81190
DC Field | Value | |
---|---|---|
dc.title | Single-phase parallel power processing scheme with power factor control | |
dc.contributor.author | Srinivasan, R. | |
dc.contributor.author | Oruganti, R. | |
dc.date.accessioned | 2014-10-07T03:05:37Z | |
dc.date.available | 2014-10-07T03:05:37Z | |
dc.date.issued | 1996 | |
dc.identifier.citation | Srinivasan, R.,Oruganti, R. (1996). Single-phase parallel power processing scheme with power factor control. International Journal of Electronics 80 (2) : 291-306. ScholarBank@NUS Repository. | |
dc.identifier.issn | 00207217 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/81190 | |
dc.description.abstract | With the enforcement of agency standards such as IEC-555-2 for the harmonic components of the input line current, conventional single phase AC to DC power converters with a rectifier-capacitor type input interface can no longer be used in switch-mode power supplies except for power levels below 75 W. As a result, several alternative AC to DC converters, called Power Factor Corrected (PFC) converters, meeting the agency requirements have been proposed. Most of these achieve near sinusoidal input current irrespective of power levels. However, for lower power levels ( | |
dc.source | Scopus | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.description.sourcetitle | International Journal of Electronics | |
dc.description.volume | 80 | |
dc.description.issue | 2 | |
dc.description.page | 291-306 | |
dc.description.coden | IJELA | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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