Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2002.807708
Title: Modeling of tunneling currents through HfO2 and (HfO2)x(Al2O3)1-x gate stacks
Authors: Hou, Y.T. 
Li, M.F. 
Yu, H.Y. 
Kwong, D.-L.
Keywords: (HfO2)x(Al2O3 )1-x
CMOS scaling
HfO2
High-k gate dielectric stacks
Tunneling current
Issue Date: Feb-2003
Citation: Hou, Y.T., Li, M.F., Yu, H.Y., Kwong, D.-L. (2003-02). Modeling of tunneling currents through HfO2 and (HfO2)x(Al2O3)1-x gate stacks. IEEE Electron Device Letters 24 (2) : 96-98. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2002.807708
Abstract: We present a physical modeling of tunneling currents through ultrathin high-k gate stacks, which includes an ultrathin interface layer, both electron and hole quantization in the substrate and gate electrode, and energy band offsets between high-k dielectrics and Si determined from high-resolution XPS. Excellent agreements between simulated and experimentally measured tunneling currents have been obtained for chemical vapor deposited and physical vapor deposited HfO2 with and without NH3-based Interface layers, and ALD Al2O3 gate stacks with different EOT and bias polarities. This model is applied to more thermally stable (HfO2)x(Al2O3)1-x gate stacks in order to project their scalability for future CMOS applications.
Source Title: IEEE Electron Device Letters
URI: http://scholarbank.nus.edu.sg/handle/10635/80738
ISSN: 07413106
DOI: 10.1109/LED.2002.807708
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