Please use this identifier to cite or link to this item: https://doi.org/10.1109/55.748912
Title: A New Model for the Post-Stress Interface Trap Generation in Hot-Carrier Stressed P-MOSFET's
Authors: Ang, D.S. 
Ling, C.H. 
Keywords: Electron traps
Hot-carrier degradation
MOSFET's
Post-stress interface trap generation
Issue Date: Mar-1999
Citation: Ang, D.S., Ling, C.H. (1999-03). A New Model for the Post-Stress Interface Trap Generation in Hot-Carrier Stressed P-MOSFET's. IEEE Electron Device Letters 20 (3) : 135-137. ScholarBank@NUS Repository. https://doi.org/10.1109/55.748912
Abstract: A new insight into the post-stress interface trap (Nit) generation in hot-electron stressed p-MOSFET's is presented.Nit generation is suppressed for positive oxide field but enhanced for negative oxide field. This observation provides strong support for a two-carrier model, involving the recombination between trapped electrons and inversion holes. While post-stress interface instability has generally been associated with hole trapping and hydrogen transport, our results clearly show the importance of electron traps on the long term stability of the Si-SiO2 interface, and that the two-carrier model provides a consistent explanation for post-stress Nit generation in p-MOSFET's stressed under hot-electron injection.
Source Title: IEEE Electron Device Letters
URI: http://scholarbank.nus.edu.sg/handle/10635/80278
ISSN: 07413106
DOI: 10.1109/55.748912
Appears in Collections:Staff Publications

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