Please use this identifier to cite or link to this item: https://doi.org/10.1109/CASES.2013.6662519
Title: Power-performance modeling on asymmetric multi-cores
Authors: Pricopi, M.
Muthukaruppan, T.S.
Venkataramani, V.
Mitra, T. 
Vishin, S.
Issue Date: 2013
Source: Pricopi, M.,Muthukaruppan, T.S.,Venkataramani, V.,Mitra, T.,Vishin, S. (2013). Power-performance modeling on asymmetric multi-cores. 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2013 : -. ScholarBank@NUS Repository. https://doi.org/10.1109/CASES.2013.6662519
Abstract: Asymmetric multi-core architectures have recently emerged as a promising alternative in a power and thermal constrained environment. They typically integrate cores with different power and performance characteristics, which makes mapping of workloads to appropriate cores a challenging task. Limited number of performance counters and heterogeneous memory hierarchy increase the difficulty in predicting the performance and power consumption across cores in commercial asymmetric multi-core architectures. In this work, we propose a software-based modeling technique that can estimate performance and power consumption of workloads for different core types. We evaluate the accuracy of our technique on ARM big. LITTLE asymmetric multi-core platform. © 2013 IEEE.
Source Title: 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2013
URI: http://scholarbank.nus.edu.sg/handle/10635/78292
DOI: 10.1109/CASES.2013.6662519
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