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|Title:||Implementation of core coalition on FPGAs|
|Citation:||Mysur, K.T.,Pricopi, M.,Marconi, T.,Mitra, T. (2013). Implementation of core coalition on FPGAs. IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC : 198-203. ScholarBank@NUS Repository. https://doi.org/10.1109/VLSI-SoC.2013.6673275|
|Abstract:||Embedded systems increasingly need to support dynamic and diverse application landscape. In response, performance asymmetric multi-cores, comprising of identical instruction-set architecture but micro-Architecturally distinct set of simple and complex cores, have emerged as an attractive alternative to accommodate software diversity. Dynamic heterogeneous multi-core architectures take this concept forward by allowing on-demand formation of virtual asymmetric multi-cores through coalition of physically symmetric simple cores and thus adjust better to workload variation at runtime. In this paper, we present the first hardware implementation of a core coalition architecture and synthesize its functional prototype on FPGAs. © 2013 IEEE.|
|Source Title:||IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC|
|Appears in Collections:||Staff Publications|
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