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|Title:||Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes|
Sparse matrix format
|Citation:||Tang, W.T., Tan, W.J., Ray, R., Wong, Y.W., Chen, W., Kuo, S.-H., Goh, R.S.M., Turner, S.J., Wong, W.-F. (2013). Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes. International Conference for High Performance Computing, Networking, Storage and Analysis, SC : -. ScholarBank@NUS Repository. https://doi.org/10.1145/2503210.2503234|
|Abstract:||The sparse matrix-vector (SpMV) multiplication routine is an important building block used in many iterative algo-rithms for solving scientific and engineering problems. One of the main challenges of SpMV is its memory-boundedness. Although compression has been proposed previously to im-prove SpMV performance on CPUs, its use has not been demonstrated on the GPU because of the serial nature of many compression and decompression schemes. In this pa-per, we introduce a family of bit-representation-optimized (BRO) compression schemes for representing sparse matrices on GPUs. The proposed schemes, BRO-ELL, BRO-COO, and BRO-HYB, perform compression on index data and help to speed up SpMV on GPUs through reduction of memory trafic. Furthermore, we formulate a BRO-aware matrix re-ordering scheme as a data clustering problem and use it to increase compression ratios. With the proposed schemes, ex-periments show that average speedups of 1.5 compared to ELLPACK and HYB can be achieved for SpMV on GPUs. Copyright 2013 ACM.|
|Source Title:||International Conference for High Performance Computing, Networking, Storage and Analysis, SC|
|Appears in Collections:||Staff Publications|
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