Strain Engineering for Advanced Silicon, Germanium and Germanium-Tin Transistors

Abstract

Strain engineering has been widely adopted since 90 nm technology node to improve the transistor performance. Diamond-like Carbon liner exhibiting ultra-high intrinsic compressive stress was integrated on Si p-channel field effect transistors (p-FETs), and carrier transport study was performed on these strained transistors. A new concept by exploiting phase change (PC) materials as liner stressors was explored. The volume reduction of PC liners during phase transformation would result in very large compressive stress in the device channel. Large drive current IDsat enhancement was achieved by integrating PC liner stressors on Si p-FinFETs. Additionally, high performance Ge gate-all-around (GAA) nanowire (NW) p-FETs was realized and integrated with the Ge2Sb2Te5 liner stressor for further IDsat improvement. GeSn as a high-mobility channel material was also studied. Realization of relaxed and tensile strained GeSn films was demonstrated and confirmed by Raman spectroscopic measurements, which enables the fabrication of high performance n-channel GeSn FETs.