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|Title:||Optimization of flip chip interconnect reliability using a variable compliance interconnect design|
|Authors:||Tay, A.A.O. |
|Source:||Tay, A.A.O.,Sun, W. (2006). Optimization of flip chip interconnect reliability using a variable compliance interconnect design. Proceedings of the Electronic Packaging Technology Conference, EPTC : 133-137. ScholarBank@NUS Repository. https://doi.org/10.1109/EPTC.2006.342704|
|Abstract:||This paper describes a finite element parametric study of the reliability of the solder joints of a flip chip package in which the height H and diameta D of copper column interconnects are varied. It was found that when D was kept constant at 50μm while H was varied, from 25μm to 150μm, thae was a local optimum at around H=50μm. Thus while the compliance of the intaconnect with H=100μm was greater, it did not lead to a longa fatigue life. However, beyond H=125 μm, any increase in length/compliance did lead to a longa fatigue life. Similarly, when the interconnect height H was kept constant at 150μm while the diameta D was varied from 15μm to 35μm, it was found that a local optimum existed at around D=25μm. Next a simulation was conducted in which the height of the intaconnects H was kept constant at 150μm while the diameta D on the same chip was decreased continuously from 35μm at the center to 15μm at the perimeter of the chip. It was found that this case where the compliance is low at the center and high at the perimeter of the chip gave fatigue lives which were more than double that of the local optimum case mentioned above where D was constant at 25μm. Hence, an interconnect design where the compliance of the intaconnects on the same chip is varied from a low value at the center to a high value at the perimeter will lead to optimum reliability of the critical solder joint. © 2006 IEEE.|
|Source Title:||Proceedings of the Electronic Packaging Technology Conference, EPTC|
|Appears in Collections:||Staff Publications|
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