Please use this identifier to cite or link to this item: https://doi.org/10.1109/VLSIT.2008.4588553
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dc.titlePerformance breakthrough in 8 nm gate length gate-all-around nanowire transistors using metallic nanowire contacts
dc.contributor.authorJiang, Y.
dc.contributor.authorLiow, T.Y.
dc.contributor.authorSingh, N.
dc.contributor.authorTan, L.H.
dc.contributor.authorLo, G.Q.
dc.contributor.authorChan, D.S.H.
dc.contributor.authorKwong, D.L.
dc.date.accessioned2014-06-19T03:23:18Z
dc.date.available2014-06-19T03:23:18Z
dc.date.issued2008
dc.identifier.citationJiang, Y.,Liow, T.Y.,Singh, N.,Tan, L.H.,Lo, G.Q.,Chan, D.S.H.,Kwong, D.L. (2008). Performance breakthrough in 8 nm gate length gate-all-around nanowire transistors using metallic nanowire contacts. Digest of Technical Papers - Symposium on VLSI Technology : 34-35. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/VLSIT.2008.4588553" target="_blank">https://doi.org/10.1109/VLSIT.2008.4588553</a>
dc.identifier.isbn9781424418053
dc.identifier.issn07431562
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/71399
dc.description.abstractParasitic S/D resistances in extremely scaled GAA nanowire devices can pathologically limit the device drive current performance. We demonstrate for the first time, that S/D extension dopant profile engineering together with successful integration of low resistivity metallic nanowire contacts greatly reduces parasitic resistances. This allows 8nm gate length GAA nanowire devices in this work to attain record-high drive currents of 3740μA/μm. © 2008 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/VLSIT.2008.4588553
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/VLSIT.2008.4588553
dc.description.sourcetitleDigest of Technical Papers - Symposium on VLSI Technology
dc.description.page34-35
dc.description.codenDTPTE
dc.identifier.isiutNOT_IN_WOS
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