Please use this identifier to cite or link to this item:
https://doi.org/10.1109/EDSSC.2005.1635217
DC Field | Value | |
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dc.title | Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate | |
dc.contributor.author | Yeo, C.C. | |
dc.contributor.author | Lee, M.H. | |
dc.contributor.author | Liu, C.W. | |
dc.contributor.author | Choi, K.J. | |
dc.contributor.author | Lee, T.W. | |
dc.contributor.author | Cho, B.J. | |
dc.date.accessioned | 2014-06-19T03:17:45Z | |
dc.date.available | 2014-06-19T03:17:45Z | |
dc.date.issued | 2006 | |
dc.identifier.citation | Yeo, C.C.,Lee, M.H.,Liu, C.W.,Choi, K.J.,Lee, T.W.,Cho, B.J. (2006). Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate. 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC : 107-110. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/EDSSC.2005.1635217" target="_blank">https://doi.org/10.1109/EDSSC.2005.1635217</a> | |
dc.identifier.isbn | 0780393392 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/70917 | |
dc.description.abstract | Metal gate/High-K slack CMOSFETs on ultra thin Ge epi channel on relaxed Si, capped with ultra thin Si (Si/Ge/Si substrate) were evaluated. NMOSFET shows enhanced mobility at low field while pMOSFET shows degraded peak mobility, with enhancement observed only at high field. © 2005 IEEE. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/EDSSC.2005.1635217 | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1109/EDSSC.2005.1635217 | |
dc.description.sourcetitle | 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC | |
dc.description.page | 107-110 | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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